It is known to use a capacitance arranged between the ground terminal and the supply terminal for a low-impedance DC decoupling between the ground and the supply voltage of an integrated circuit (IC) arranged on a printed circuit board. Such a capacitance may generally be provided either by capacitors arranged in discrete fashion on the printed circuit board or by plate capacitors formed by inner layers of the printed circuit board. Such inner layers are, in particular, a printed circuit board layer connected to ground (GND) and a printed circuit board layer connected to the operating voltage (Vcc). The latter is also referred to as supply layer.
If an IC is “served” from the supply layers of the printed circuit board and draws current for its supply, then this may adversely affect the emission properties of the printed circuit board insofar as a radiofrequency interference corresponding to radiofrequency components of the current drawn by the IC may be transferred over large parts of the printed circuit board. At high frequencies of greater than 2 GHz, a structural resonance may be excited even in the case of relatively small module printed circuit boards of the 50×10 mm2 type.
For better illustration, the printed circuit board may in this case be regarded as a low-impedance waveguide. If the inner layer plate capacitor is in parallel with discrete decoupling capacitors, then the IC is served firstly from the inner layers, since the capacitor formed by the inner layers typically has a smaller parasitic inductance and thus a lower RF impedance.
Therefore, it has proved to be advantageous for reasons of electromagnetic compatibility (EMV) to place a decoupling capacitor directly between the supply pin and the ground pin of an IC. Such a configuration is illustrated in FIGS. 5 and 6. A chip 1 having a multiplicity of electrical terminal pins 10 is placed onto the surface of a printed circuit board 6. Two of the contact pins of the chip 1 are the ground pin 11 and the supply pin 12. These are connected to inner layers 61, 62 of the printed circuit board 6 via electrical lines 21, 22 on the surface of the printed circuit board 6 and by means of plated-through holes 51, 52. One inner layer 62 has the potential Vcc in this case. The other inner layer 61 is connected to ground GND.
A decoupling capacitor 3 is placed between the lines 21, 22 and thus directly between the ground pin 11 and the supply pin 12. It is furthermore provided that the connection to the inner layers 61, 62 of the printed circuit board 6 is effected via lossy ferritic coils 81, 82 (so-called “ferrite beads”). Ferrite beads comprise a wire generally made of copper or aluminum that is embedded in a ferritic material. They constitute frequency-dependent resistors which, at a specific frequency, are in resonance and, in resonance, have a purely real resistance usually of a few hundred Ohms. The DC resistance is very small. Ferrite beads are known per se.
In the case of the configuration illustrated in FIGS. 5 and 6, the chip 1 draws the radiofrequency components of its current supply from the decoupling capacitor 3 (and not from the inner layer plate capacitor of the printed circuit board 6), with the result that the radiofrequency components can be kept away from the printed circuit board 6 and cannot lead to structural resonances there. In this case, the arrangement acts as a filter of the supply voltage drawn, only the low-frequency components being transmitted toward the printed circuit board 6.
The construction illustrated in FIGS. 5 and 6 is practicable, however, only when the terminal pins of the IC to be decoupled enable a direct decoupling. However, many of the modern ICs have pin-outs that do not enable a decoupling in accordance with FIGS. 5 and 6. By way of example, BGA housings are designed in such a way that a disentanglement is provided in inner layers. QFN housings constitute another example, in the case of which the Vcc pin and the GND pin are spatially very far away from one another. If it is attempted to decouple such ICs as described, then a conductor loop several millimeters in length arises for technical layout reasons. This situation is illustrated in FIG. 7. A corresponding conductor loop 23 has a parasitic inductance of several nH in the decoupling path. The consequence of this is that impedances of greater than 30 ohms occur at frequencies of greater than 2 GHz, with the result that the decoupling capacitor can no longer be used effectively: the high impedance prevents the IC from being able to be supplied effectively by means of the decoupling capacitor with regard to the radiofrequency components of its current supply.
There is a need for simple, efficient and diversely useable printed circuit boards and arrangements in which ICs arranged on printed circuit boards have a low-impedance DC decoupling between the ground terminal and the supply voltage terminal.